An Eecient Path Delay Fault Coverage Estimator
نویسندگان
چکیده
Keerthi Heragu Michael L. Bushnell Vishwani D. Agrawal Dept. of Electrical & Computer Eng. Dept. of Electrical & Computer Eng. AT&T Bell Labs Rutgers University Rutgers University 600 Mountain Avenue Piscataway, NJ 08855-0909 Piscataway, NJ 08855-0909 Murray Hill, NJ 07974 [email protected] [email protected] [email protected] Abstract|We propose a linear complexity method to estimate robust path delay fault coverage in digital circuits. We adopt a path counting scheme for a true-value simulator that uses ags for each signal line. These ags determine the new path delay faults detected by the simulated vector pair. Experimental results are presented to show the e ectiveness of the method in estimating path delay fault coverage.
منابع مشابه
An Ecient P Ath Delay F Ault Coverage Estimator
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تاریخ انتشار 1994